How a Chip Is Manufactured

A semiconductor chip is an integrated circuit etched onto a small piece of silicon. Inside that thumbnail-sized sliver of material are billions of transistors—tiny switches that turn on and off billions of times per second, performing the calculations that power everything from smartphones to satellites.

Manufacturing these chips is the most complex industrial process ever devised. It requires precision at scales invisible to the human eye, temperatures that would melt steel, chemicals purer than anything else on Earth, and machines that cost more than commercial aircraft.

It starts with sand—specifically, quartz sand, which is mostly silicon dioxide. This common material undergoes purification so extreme that the resulting silicon is 99.9999999% pure. That's nine nines: fewer than one foreign atom per billion.

The purified silicon is melted and a seed crystal is slowly pulled upward while rotating, drawing the liquid into a perfect single-crystal cylinder called an ingot. This is the Czochralski process.

A single crystal dislocation—one atom out of place—can propagate through hundreds of chips, destroying them all.

The silicon ingot is sliced into thin wafers using diamond-coated wire saws. Each wafer is about 300mm in diameter—roughly the size of a dinner plate—but less than a millimeter thick.

These wafers are then polished using Chemical-Mechanical Planarization (CMP) until they achieve near-atomic flatness. Surface variation must be less than 10 nanometers across the entire 300mm diameter.

Chips are not flat drawings—they are three-dimensional stacks. Modern processors can have over 100 distinct layers: insulators, conductors, and semiconductors deposited one atom-thin film at a time.

Deposition methods include Chemical Vapor Deposition (CVD), where gases react on the wafer surface to form thin films, and Atomic Layer Deposition (ALD), which builds material literally one atomic layer at a time.

Photolithography is the heart of chip manufacturing. A light-sensitive coating called photoresist is applied to the wafer. Light is then projected through a mask containing the circuit pattern, exposing the photoresist in precise locations.

For decades, the industry used deep ultraviolet (DUV) light at 193nm. But modern transistors are smaller than that wavelength. The solution? Extreme Ultraviolet (EUV) light at 13.5nm—wavelengths so short they require mirrors instead of lenses, and vacuum instead of air.

After photolithography exposes the pattern, etching removes material selectively. Plasma etching uses ionized gases to carve away material with atomic precision.

This controlled imperfection is what makes transistors work. Logic emerges from imbalance.

The transistor is the fundamental building block of digital logic. It has three parts: a gate (the control), a source (where current enters), and a drain (where current exits). When voltage is applied to the gate, current flows. Remove the voltage, and current stops. On and off. One and zero.

Modern chips use three-dimensional transistor structures called FinFETs, where the channel forms a vertical fin that the gate wraps around. The newest chips use Gate-All-Around (GAA) transistors for even better control.

Building transistors is only half the challenge. Connecting billions of them is equally complex. Modern chips have 10-15 layers of copper wiring stacked above the transistors, forming an intricate network of connections.

The copper is deposited using the damascene process: trenches are etched into insulating material, filled with copper, and polished flat. Vertical connections called vias link different metal layers.

At these scales, wires become significant resistors and capacitors. Signal delay in the interconnects now rivals delay in the transistors themselves.

Here's a truth the industry doesn't advertise: most chips fail. At leading-edge nodes, yields can be as low as 50% when a new process starts. Even mature processes rarely exceed 90%.

Probe stations test each die on the wafer, checking electrical characteristics and functionality. Failed dies are marked. The economics of chip manufacturing are fundamentally statistics: yield determines profitability.

The wafer is diced into individual chips using diamond saws or lasers. Each working die is then mounted in a protective package that provides electrical connections to the outside world and dissipates heat.

Modern packaging has become as innovative as transistor scaling. Chiplets—multiple smaller dies combined in one package—allow different components to be manufactured at different process nodes. 2.5D and 3D integration stack dies vertically, connected by through-silicon vias.